Patent · US Active

Transistor package with three-terminal clip

US10290567B2 · kind B2 · utility

0Cited by
0References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 1, 2017
Grant dateMay 14, 2019
Priority date
Expiry dateSep 1, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/13091
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A package which comprises an electrically conductive chip carrier, a first chip comprising a first connection terminal, a second connection terminal located on the chip carrier and a control terminal, a second chip comprising a first connection terminal, a second connection terminal located on the chip carrier and a control terminal, wherein the first chip and the second chip are connected to form a half bridge having inlet terminals and an outlet terminal, and a clip having three connection sections connecting the second connection terminal of the first chip with the first connection terminal of the second chip and with the outlet terminal of the half bridge.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.