Process based metrology target design
US10296681B2 · kind B2 · utility
1Cited by
9References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 17, 2018 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | May 17, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.