Wraparound top electrode line for crossbar array resistive switching device
US10297750B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2017 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | Nov 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A method is presented for forming a semiconductor device. The method includes depositing an insulating layer over a semiconductor substrate, etching the insulating layer to form a plurality of trenches for receiving a first conducting material, forming a resistive switching memory element over at least one trench of the plurality of trenches, the resistive switching memory element having a conducting cap formed thereon, and depositing a dielectric cap over the trenches. The method further includes etching portions of the insulating layer to expose a section of the dielectric cap formed over the resistive switching memory element, etching the exposed section of the dielectric cap to expose the conducting cap of the resistive switching memory element, and forming a barrier layer in direct contact with the exposed section of the conducting cap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.