Inventor · Delmar, NY, US

Michael Rizzolo

201Patents
10h-index
85Co-inventors
79Inventor score

Filing activity: Sep 24, 2009 → Apr 25, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US9837355B2 Method for maximizing air gap in back end of the line interconnect through via landing modification Electricity 294 Active
US8027162B2 Liquid-cooled electronics apparatus and methods of fabrication Electricity 95 Active
US10707413B1 Formation of embedded magnetic random-access memory devices Electricity 19 Active
US10395986B1 Fully aligned via employing selective metal deposition Electricity 16 Active
US9911651B1 Skip-vias bypassing a metallization level at minimum pitch Electricity 16 Active
US9553019B1 Airgap protection layer for via alignment Electricity 15 Active
US9966337B1 Fully aligned via with integrated air gaps Electricity 13 Active
US10243020B1 Structures and methods for embedded magnetic random access memory (MRAM) fabrication Electricity 11 Active
US9917137B1 Integrated magnetic tunnel junction (MTJ) in back end of line (BEOL) interconnects Electricity 10 Active
US9754883B1 Hybrid metal interconnects with a bamboo grain microstructure Electricity 10 Active
US10045096B2 Social media modification of behavior and mobile screening for impairment Electricity 8 Active
US9685366B1 Forming chamferless vias using thermally decomposable porefiller Electricity 8 Active
US9418934B1 Structure and fabrication method for electromigration immortal nanoscale interconnects Electricity 6 Active
US10297750B1 Wraparound top electrode line for crossbar array resistive switching device Electricity 6 Active
US9548243B1 Self aligned via and pillar cut for at least a self aligned double pitch Electricity 6 Active
US9780035B1 Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects Electricity 6 Active
US10096769B2 Bottom electrode for MRAM applications Electricity 6 Active
US9431205B1 Fold over emitter and collector field emission transistor Physics 6 Active
US10204828B1 Enabling low resistance gates and contacts integrated with bilayer dielectrics Electricity 6 Active
US9793206B1 Heterogeneous metallization using solid diffusion removal of metal interconnects Electricity 5 Active
US10109579B2 Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device Electricity 5 Active
US9941088B2 Fold over emitter and collector field emission transistor Physics 4 Active
US10957850B2 Multi-layer encapsulation to enable endpoint-based process control for embedded memory fabrication Electricity 4 Active
US9758095B2 Smartwatch blackbox Performing Operations; Transporting 4 Active
US11223008B2 Pillar-based memory hardmask smoothing and stress reduction Electricity 4 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.