Identifying asynchronous power loss
US10303535B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2018 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Mar 5, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/144
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus include controllers configured to iteratively program a group of memory cells to respective desired data states; determine whether a power loss to the apparatus is indicated while iteratively programming the group of memory cells; and if a power loss to the apparatus is indicated, to change the desired data state of the particular memory cell before continuing with the programming. Apparatus further include controllers configured to read a particular memory cell of a last written page of memory cells, determine whether a threshold voltage of the particular memory cell is less than a particular voltage level, and to mark the last written page of memory cells as affected by power loss during a programming operation of the last written page of memory cells when the threshold voltage of the particular memory cell is determined to be higher than the particular voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.