Performing error correction in computer memory
US10304560B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 2016 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Sep 7, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Performing error correction in computer memory including receiving a read request targeting a read address within the computer memory; accessing a mark table comprising a plurality of entries, each entry including a field specifying a region size, a field specifying a match address, and a field specifying a mark location; performing a lookup of the mark table using the read address including, for each entry in the mark table: generating a mask based on the region size stored in the entry; determining, based on the mask, whether the read address is within a memory region specified by the match address and region size stored in the entry; and if the read address is within the memory region specified by the match address and region size stored in the entry, performing error correction using the mark location stored in the entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.