Brad W. Michael
41Patents
7h-index
49Co-inventors
69Inventor score
Filing activity: Oct 22, 1992 → Aug 30, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8520740B2 | Arithmetic decoding acceleration | Electricity | 50 | Active |
| US6421053B1 | Block rendering method for a graphics subsystem | Physics | 36 | Expired |
| US5430847A | Method and system for extending system buses to external devices | Physics | 34 | Expired |
| US8522225B2 | Rewriting branch instructions using branch stubs | Physics | 15 | Active |
| US9430418B2 | Synchronization and order detection in a memory system | Physics | 11 | Active |
| US8516230B2 | SPE software instruction cache | Physics | 10 | Active |
| US8631225B2 | Dynamically rewriting branch instructions to directly target an instruction cache location | Physics | 7 | Active |
| US8782381B2 | Dynamically rewriting branch instructions in response to cache line eviction | Physics | 6 | Active |
| US8713548B2 | Rewriting branch instructions using branch stubs | Physics | 6 | Active |
| US7486096B2 | Method and apparatus for testing to determine minimum operating voltages in electronic devices | Physics | 6 | Active |
| US8627051B2 | Dynamically rewriting branch instructions to directly target an instruction cache location | Physics | 5 | Active |
| US7986330B2 | Method and apparatus for generating gammacorrected antialiased lines | Physics | 4 | Active |
| US7610531B2 | Modifying a test pattern to control power supply noise | Physics | 4 | Active |
| US7203608B1 | Impedane measurement of chip, package, and board power supply system using pseudo impulse response | Physics | 4 | Active |
| US10169013B2 | Arranging binary code based on call graph partitioning | Physics | 4 | Active |
| US9459851B2 | Arranging binary code based on call graph partitioning | Physics | 3 | Active |
| US10297335B2 | Tracking address ranges for computer memory errors | Physics | 3 | Active |
| US9594647B2 | Synchronization and order detection in a memory system | Physics | 3 | Active |
| US10338999B2 | Confirming memory marks indicating an error in computer memory | Physics | 2 | Active |
| US10353669B2 | Managing entries in a mark table of computer memory errors | Physics | 2 | Active |
| US7149877B2 | Byte execution unit for carrying out byte instructions in a processor | Physics | 2 | Expired |
| US10304560B2 | Performing error correction in computer memory | Physics | 2 | Active |
| US8145804B2 | Systems and methods for transferring data to maintain preferred slot positions in a bi-endian processor | Physics | 1 | Active |
| US9940204B2 | Memory error recovery | Physics | 1 | Active |
| US9600253B2 | Arranging binary code based on call graph partitioning | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.