Method and apparatus for improved etch stop layer or hard mask layer of a memory device

US10304749B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Christopher W. Petz · Boise, US
• Philip M. Campbell · Round Rock, US
• Wei Yeeng Ng · Boise, US
• Kunal Shrotri · Boise, US
• Saurabh Keshav · Boise, US
• John Mark Meldrim · Boise, US
• Prakash Rau Mokhna Rau · Boise, US
• Tom J. John · Boise, US

Key dates

• Filing date: Jun 20, 2017
• Grant date: May 28, 2019
• Expiry date: Jun 20, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B43/35
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In one embodiment, an apparatus comprises an etch stop layer comprising Aluminum Oxide and one or more of Hafnium, Silicon, or Magnesium; and a channel formed through one or more layers deposited over the etch stop layer, the channel extending to the etch stop layer.