Packaging with substrates connected by conductive bumps
US10304800B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2017 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Nov 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a first substrate including a first surface and a second surface opposite to the first surface; a first die disposed over the second surface of the first substrate; a plurality of first conductive bumps disposed between the first die and the first substrate; a molding disposed over the first substrate and surrounding the first die and the plurality of first conductive bumps; a second substrate disposed below the first surface of the first substrate; a plurality of second conductive bumps disposed between the first substrate and the second substrate; and a second die disposed between the first substrate and the second substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.