Memory system having a semiconductor memory device with protected blocks
US10310755B2 · kind B2 · utility
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5References
16Claims
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Assignee
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Key dates
| Filing date | Feb 24, 2016 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Feb 24, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a semiconductor memory device including a plurality of blocks, and a controller configured to register a block designated in a protection command as a protected block in a storage region. When the control circuit receives from a host a command to erase the protected block or write to the protected block, the control circuit does not issue a corresponding erase or write command to the semiconductor memory device and notifies the host of the failure to execute the command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.