Inventor · Tokyo, JP

Hirosuke Narai

12Patents

2h-index

11Co-inventors

43Inventor score

Filing activity: Feb 24, 2016 → Aug 29, 2022

Most-cited inventions

Patent	Title	Area	Cited by	Status
US10621034B2	Memory device that changes a writable region of a data buffer based on an operational state of an ECC circuit	Physics	2	Active
US9959937B2	Memory system including test circuit	Physics	2	Active
US9728275B2	Memory system that handles access to bad blocks	Physics	2	Active
US9891987B2	Memory device that communicates error correction results to a host	Physics	2	Active
US10289482B2	Memory device that updates parameters transmitted to a host based on operational settings	Physics	2	Active
US10769011B2	Memory device that changes a writable region of a data buffer based on an operational state of an ECC circuit	Physics	1	Active
US9747994B2	Memory system	Electricity	0	Active
US10235070B2	Memory system having a semiconductor memory device with protected blocks	Physics	0	Active
US9620230B2	Memory device that performs an advance reading operation	Physics	0	Active
US10445174B2	Memory device that communicates error correction results to a host	Physics	0	Active
US10310755B2	Memory system having a semiconductor memory device with protected blocks	Physics	0	Active
US11892503B2	Semiconductor device and test method of semiconductor device	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.