Techniques for changing management modes of multilevel memory hierarchy

US10318153B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Sergey Blagodurov · Bellevue, US
• Mitesh R. Meswani · Austin, US
• Gabriel H. Loh · Bellevue, US
• Mauricio Breternitz · Austin, US
• Mark Richard Nutter · Austin, US
• John R. Slice · Ramona, US
• David A. Roberts · Santa Cruz, US
• Michael Ignatowski · Red Hook, US
• Mark H. Oskin · Seattle, US

Key dates

• Filing date: Dec 19, 2014
• Grant date: Jun 11, 2019
• Expiry date: Nov 24, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F3/0685
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A processor modifies memory management mode for a range of memory locations of a multilevel memory hierarchy based on changes in an application phase of an application executing at a processor. The processor monitors the application phase (e.g., computation-bound phase, input/output phase, or memory access phase) of the executing application and in response to a change in phase consults a management policy to identify a memory management mode. The processor automatically reconfigures a memory controller and other modules so that a range of memory locations of the multilevel memory hierarchy are managed according to the identified memory management mode. By changing the memory management mode for the range of memory locations according to the application phase, the processor improves processing efficiency and flexibility.