Skip via for metal interconnects
US10319629B1 · kind B1 · utility
12Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 8, 2018 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | May 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices including skip via structures and methods of forming the skip via structure include interconnection between two interconnect levels that are separated by at least one other interconnect level, i.e., skip via to connect Mx and Mx+2 interconnect levels, wherein a portion of the intervening metallization level (MX+1) is in a pathway of the skip via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.