Semiconductor package with leadframe

US10319671B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Dirk Ahlers · Hersbruck, DE
• Gilles Delarozee · Kleinmachnow, DE
• Daniel Schleisser · Munich, DE
• Christopher Spielman · Redford, US
• Thomas Stoek · Buxtehude, DE

Key dates

• Filing date: May 21, 2018
• Grant date: Jun 11, 2019
• Expiry date: May 21, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/181
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor package includes a leadframe, a first transistor chip connected to a first island of the leadframe in a drain-down configuration, and a second transistor chip connected to a second island of the leadframe in the same drain-down configuration as the first transistor chip. The first and the second islands of the leadframe are mutually electrically isolated from one another. The first island includes an extension which extends beyond a perimeter of the first transistor chip in a direction towards the second island and overlaps the second transistor chip. The first transistor chip and the second transistor chip are electrically interconnected with one another via the extension of the first island and a first electric connection element electrically connecting the extension to the second transistor chip to form a half bridge circuit.