Vertical semiconductor device having a stacked die block
US10325881B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2017 |
| Grant date | Jun 18, 2019 |
| Priority date | — |
| Expiry date | Jun 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/2064
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device vertically mounted on a medium such as a printed circuit board, and a method of its manufacture, are disclosed. The semiconductor device includes a stack of semiconductor die having contact pads which extend to an active edge of the die aligned on one side of the stack. The active edges of the die are affixed to the PCB and the contact pads at the active edge are electrically coupled to the PCB. This configuration provides an optimal, high density arrangement of semiconductor die in the device, where a large number of semiconductor die can be mounted and electrically coupled directly to the PCT, without a substrate, without staggering the semiconductor die, and without using wire bonds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.