Porous low-k dielectric etch
US10361091B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2017 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | May 31, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching features into a porous low-k dielectric etch layer is provided. A plurality of cycles is performed in a plasma processing chamber. Each cycle comprises a deposition phase and an activation phase. The deposition phase comprises flowing a deposition gas comprising a fluorocarbon and/or hydrofluorocarbon gas, creating a plasma in the plasma processing chamber using the deposition gas, depositing a fluorocarbon or hydrofluorocarbon containing layer, and stopping the flow of the deposition gas. The activation phase comprises flowing an activation gas comprising a noble gas and a carbon etching additive, creating a plasma in the plasma processing chamber using the activation gas, providing an activation bias in the plasma processing chamber, wherein the activation bias causes the etching of the low-k dielectric layer, with consumption of the fluorocarbon or hydrofluorocarbon containing layer, and stopping the flow of the activation gas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.