Methods and structures for forming uniform fins when using hardmask patterns
US10361125B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2017 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | Dec 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device includes forming a hardmask layer on a substrate, patterning the hardmask layer to form a plurality of patterned hardmask portions on the substrate, depositing a dummy hardmask layer on the substrate, patterning the dummy hardmask layer to form a plurality of patterned dummy hardmask portions on the substrate, wherein each of the plurality of patterned dummy hardmask portions is positioned adjacent respective outermost patterned hardmask portions of the plurality of patterned hardmask portions, and transferring a pattern of the plurality of patterned hardmask portions and the plurality of patterned dummy hardmask portions to the substrate to form a plurality of fins and a plurality of dummy fins from the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.