Vertical fin-type devices and methods
US10361293B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2018 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | Jan 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/713
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is an integrated circuit (IC) structure that incorporates a string of vertical devices. Embodiments of the IC structure include a string of two or more vertical diodes. Other embodiments include a vertical diode/silicon-controlled rectifier (SCR) string and, more particularly, a diode-triggered silicon-controlled rectifier (VDTSCR). In any case, each embodiment of the IC structure includes an N-well in a substrate and, within that N-well, a P-doped region and an N-doped region that abuts the P-doped region. The P-doped region can be anode of a vertical diode and can be electrically connected to the N-doped region (e.g., by a local interconnect or by contacts and metal wiring) such that the vertical diode is electrically connected to another vertical device (e.g., another vertical diode or a SCR with vertically-oriented features). Also disclosed is a manufacturing method that can be integrated with methods of manufacturing vertical field effect transistors (VFETs).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.