Methods for cyclic etching of a patterned layer
US10366902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2017 |
| Grant date | Jul 30, 2019 |
| Priority date | — |
| Expiry date | Feb 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/334
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and systems for cyclic etching of a patterned layer are described. In an embodiment, a method includes receiving a substrate comprising an underlying layer, a mask layer that exposes portions of an intermediate layer that is disposed between the underlying layer and the mask layer. An embodiment may also include forming a first layer on the mask layer and a second layer on the exposed portions of the intermediate layer, the first layer and the second layer being concurrently formed. Additionally, the method may include removing, concurrently, the first layer and the second layer from the substrate. In such embodiments, the method may include alternating between the forming and the removing until portions of the underlying layer are exposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.