Localized high density substrate routing

US10366951B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Robert Starkston · Phoenix, US
• Debendra Mallik · Chandler, US
• John S. Guzek · Chandler, US
• Chia-Pin Chiu · Tempe, US
• Deepak Kulkarni · Chandler, US
• Ravindranath V. Mahajan · Chandler, US

Key dates

• Filing date: Jun 12, 2017
• Grant date: Jul 30, 2019
• Expiry date: Apr 25, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15192
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.