Patent · US Active

Interconnect structure for a microelectronic device

US10366968B2 · kind B2 · utility

1Cited by

7References

13Claims

0Family size

Assignee

Intel IP Corporation · US

Inventors

Klaus Reingruber · Langquaid, DE
Andreas Wolter · Regensburg, DE
Georg Seidemann · Landshut, DE
Thomas Wagner · Regelsbach, DE
Bernd Waidhas · Nittendorf, DE

Key dates

Filing date	Sep 30, 2016
Grant date	Jul 30, 2019
Priority date	—
Expiry date	Nov 9, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2225/1064
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A microelectronic package with two semiconductor die coupled on opposite sides of a redistribution layer 108, and at least partially overlapping with one another. At least a first of the semiconductor die includes two sets of contacts, the first group of contacts arranged at a lesser pitch relative to one another than are a second group of contacts. The first group of contacts at the larger pitch are placed to engage contacts in a redistribution layer 108. The second group of contacts at the lesser pitch are placed to engage respective contacts at the same pitch on the second semiconductor die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.