Inventor · Regelsbach, DE

Thomas Wagner

44Patents
3h-index
35Co-inventors
59Inventor score

Filing activity: Dec 21, 2006 → Feb 26, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US8076739B2 Micromechanical component and method for producing a micromechanical component Electricity 7 Active
US10403609B2 System-in-package devices and methods for forming system-in-package devices Electricity 6 Active
US8471393B2 Semiconductor component including a semiconductor chip and a passive component Electricity 6 Active
US10115668B2 Semiconductor package having a variable redistribution layer thickness Electricity 3 Active
US10209466B2 Integrated circuit packages including an optical redistribution layer Physics 2 Active
US11270941B2 Bare-die smart bridge connected with copper pillars for system-in-package apparatus Electricity 2 Active
US10665522B2 Package including an integrated routing layer and a molded routing layer Electricity 2 Active
US10546817B2 Face-up fan-out electronic package with passive components using a support Electricity 2 Active
US10553538B2 Semiconductor package having a variable redistribution layer thickness Electricity 2 Active
US10366968B2 Interconnect structure for a microelectronic device Electricity 1 Active
US10403602B2 Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory Electricity 1 Active
US10522485B2 Electrical device and a method for forming an electrical device Electricity 1 Active
US10403580B2 Molded substrate package in fan-out wafer level package Electricity 1 Active
US10727197B2 Embedded-bridge substrate connectors and methods of assembling same Electricity 0 Active
US11646288B2 Integrating and accessing passive components in wafer-level packages Electricity 0 Active
US11990408B2 WLCSP reliability improvement for package edges including package shielding Electricity 0 Active
US10699980B2 Fan out package with integrated peripheral devices and methods Electricity 0 Active
US10411000B2 Microelectronic package with illuminated backside exterior Electricity 0 Active
US12308335B2 Integrating and accessing passive components in wafer-level packages Electricity 0 Active
US12341096B2 Bare-die smart bridge connected with copper pillars for system-in-package apparatus Electricity 0 Active
US10756042B2 Multi-layer redistribution layer for wafer-level packaging Electricity 0 Active
US10816742B2 Integrated circuit packages including an optical redistribution layer Physics 0 Active
US11508637B2 Fan out package and methods Electricity 0 Active
US12362241B2 Semiconductor structure and method for forming a semiconductor structure Electricity 0 Active
US11018114B2 Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.