Tensile strain in NFET channel
US10374089B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2017 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Dec 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure includes forming a fin in a film stack disposed over a top surface of a substrate, the film stack comprising a first semiconductor layer, a second semiconductor layer and a channel layer. The method also includes forming an oxide layer disposed over the top surface of the substrate surrounding the fin, the oxide layer covering sidewalls of the first semiconductor layer and the second semiconductor layer, performing a channel release to remove the second semiconductor layer, and performing an oxidation to form a non-uniform thickness of an additional oxide layer along a length of the fin, the non-uniform thickness providing a vertical compressive strain that induces lateral tensile strain in the channel layer. The channel layer comprises an n-type field-effect transistor (NFET) channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.