Heng Wu
168Patents
11h-index
66Co-inventors
75Inventor score
Filing activity: Jan 12, 2017 → Dec 27, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10229985B1 | Vertical field-effect transistor with uniform bottom spacer | Electricity | 267 | Active |
| US10566246B1 | Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices | Electricity | 29 | Active |
| US10056289B1 | Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap | Electricity | 25 | Active |
| US10243061B1 | Nanosheet transistor | Electricity | 21 | Active |
| US10236364B1 | Tunnel transistor | Electricity | 15 | Active |
| US10084094B1 | Wrapped source/drain contacts with enhanced area | Electricity | 14 | Active |
| US10522649B2 | Inverse T-shaped contact structures having air gap spacers | Electricity | 13 | Active |
| US10797163B1 | Leakage control for gate-all-around field-effect transistor devices | Electricity | 12 | Active |
| US10134859B1 | Transistor with asymmetric spacers | Electricity | 12 | Active |
| US10388569B1 | Formation of stacked nanosheet semiconductor devices | Electricity | 12 | Active |
| US10020381B1 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Electricity | 11 | Active |
| US10985064B2 | Buried power and ground in stacked vertical transport field effect transistors | Electricity | 9 | Active |
| US11177258B2 | Stacked nanosheet CFET with gate all around structure | Electricity | 8 | Active |
| US10249755B1 | Transistor with asymmetric source/drain overlap | Electricity | 6 | Active |
| US10727315B2 | Nanosheet transistor | Electricity | 6 | Active |
| US9947767B1 | Self-limited inner spacer formation for gate-all-around field effect transistors | Electricity | 5 | Active |
| US11049953B2 | Nanosheet transistor | Electricity | 5 | Active |
| US10910470B1 | Nanosheet transistors with inner airgaps | Electricity | 4 | Active |
| US11362193B2 | Inverse T-shaped contact structures having air gap spacers | Electricity | 4 | Active |
| US10332983B1 | Vertical field-effect transistors including uniform gate lengths | Electricity | 4 | Active |
| US10332999B1 | Method and structure of forming fin field-effect transistor without strain relaxation | Electricity | 4 | Active |
| US11011617B2 | Formation of a partial air-gap spacer | Electricity | 3 | Active |
| US10374089B2 | Tensile strain in NFET channel | Electricity | 3 | Active |
| US10170590B2 | Vertical field effect transistors with uniform threshold voltage | Electricity | 3 | Active |
| US11251362B2 | Stacked spin-orbit-torque magnetoresistive random-access memory | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.