In-die transistor characterization in an IC
US10379155B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2014 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Jun 2, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2843
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In an example implementation, an integrated circuit (IC) includes: a plurality of transistors disposed in a plurality of locations on a die of the IC; conductors coupled to terminals of each of the plurality of transistors; a digital-to-analog converter (DAC), coupled to the conductors, to drive voltage signals to the plurality of transistors in response to a digital input; and an analog-to-digital converter (ADC), coupled to at least a portion of the conductors, to generate samples in response to current signals induced in the plurality of transistors in response to the voltage signals, the samples being indicative of at least one electrostatic characteristic for the plurality of transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.