Patent · US Active

Method for making a semiconductor device including a superlattice as a gettering layer

US10381242B2 · kind B2 · utility

40Cited by
69References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMay 16, 2018
Grant dateAug 13, 2019
Priority date
Expiry dateMay 19, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15311
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor processing method may include forming a superlattice gettering layer on a front side of a semiconductor substrate having a first thickness, epitaxially growing an active semiconductor layer on the superlattice gettering layer opposite the semiconductor substrate, forming at least one semiconductor device in the active semiconductor layer, and forming at least one metal interconnect layer on the active layer, and at least one metal through-via extending from the at least one metal interconnect layer into the semiconductor substrate. The method may further include thinning the semiconductor substrate from a back side thereof to a second thickness less than the first thickness, and thinning the semiconductor substrate. The superlattice gettering layer getters metal ions released by the forming of the at least one metal interconnect layer and at least one metal through-via, and thinning the substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.