Patent · US Active

Reducing cache coherence directory bandwidth by aggregating victimization requests

US10387314B2 · kind B2 · utility

0Cited by
18References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 25, 2015
Grant dateAug 20, 2019
Priority date
Expiry dateAug 7, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/621
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A directory structure that may allow concurrent processing of write-back and clean victimization requests is disclosed. The directory structure may include a memory configured to store a plurality of entries, where each entry may include information indicative of a status of a respective entry in a cache memory. Update requests for the entries in the memory may be received and stored. A subset of previously stored update requests may be selected. Each update request of the subset of the previously stored update requests may then be processed concurrently.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.