Semiconductor device and manufacturing method thereof
US10388582B2 · kind B2 · utility
4Cited by
16References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2018 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | Apr 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package and a manufacturing method thereof, which can reduce the size of the semiconductor package and improve product reliability. In a non-limiting example embodiment, the method may comprise forming an interposer on a wafer, forming at least one reinforcement member on the interposer, coupling and electrically connecting at least one semiconductor die to the interposer to the interposer, filling a region between the semiconductor die and the interposer with an underfill, and encapsulating the reinforcement member, the semiconductor die and the underfill on the interposer using an encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.