Structures with an airgap and methods of forming such structures
US10388728B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2018 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | Mar 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures that include an airgap and methods for forming a structure that includes an airgap. A layer stack is epitaxially grown on a substrate and includes a first semiconductor layer and a second semiconductor layer on a substrate. A plurality of openings are formed that extend through a device region of the first semiconductor layer to the second semiconductor layer. The second semiconductor layer is etched through the openings and selective to the substrate and the first semiconductor layer so as to form an airgap that is arranged in a vertical direction between the substrate and the device region. A device structure is formed in the device region of the first semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.