Low-complexity LDPC encoder
US10389383B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2017 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | Sep 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/616
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques are described for encoding information data bits using a low-density parity-check matrix optimized for a Low-Density Parity-Check (LDPC) encoder. In an example, the parity-check matrix includes a first matrix and a second matrix. The second matrix is a square matrix, and is also a block diagonal matrix that includes a set of square submatrices located on the diagonal of the block diagonal matrix. An intermediate vector is generated based on the information data bits and the first matrix, and a parity vector of a codeword is generated based on the intermediate vector and the second matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.