Operations on memory cells
US10395738B2 · kind B2 · utility
14Cited by
4References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 30, 2017 |
| Grant date | Aug 27, 2019 |
| Priority date | — |
| Expiry date | Nov 30, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/77
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an example, a plurality of signal pulses is applied across a plurality of memory cells concurrently until each respective memory cell reaches a desired state. Each respective memory cell is commonly coupled to a first signal line and is coupled to a different respective second signal line. Each signal pulse causes each respective memory cell to move toward the desired state by causing each respective memory cell to snap back. Current to a respective second signal line is turned off in response to each time the respective memory cell coupled thereto snaps back.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.