Process-induced distortion prediction and feedforward and feedback correction of overlay errors
US10401279B2 · kind B2 · utility
7Cited by
1References
25Claims
0Family size
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Key dates
| Filing date | Sep 18, 2014 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Aug 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Systems and methods for prediction and measurement of overlay errors are disclosed. Process-induced overlay errors may be predicted or measured utilizing film force based computational mechanics models. More specifically, information with respect to the distribution of film force is provided to a finite element (FE) model to provide more accurate point-by-point predictions in cases where complex stress patterns are present. Enhanced prediction and measurement of wafer geometry induced overlay errors are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.