System-in-package devices and methods for forming system-in-package devices
US10403609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2015 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Dec 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system-in-package device includes at least three electrical device components arranged in a common package. A first electrical device component includes a first vertical dimension, a second electrical device component includes a second vertical dimension and a third electrical device component comprises a third vertical dimension. The first electrical device component and the second electrical device component are arranged side by side in the common package. Further, the third electrical device component is arranged on top of the first electrical device component in the common package. At least a part of the third electrical device component is arranged vertically between a front side level of the second electrical device component and a back side level of the second electrical device component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.