Patent · US Active

Package-in-package structure for semiconductor devices and methods of manufacture

US10418343B2 · kind B2 · utility

0Cited by

12References

12Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Hui Teng Wang · Muar, MY
Swain Hong Yeo · Singapore, SG

Key dates

Filing date	Dec 5, 2017
Grant date	Sep 17, 2019
Priority date	—
Expiry date	Dec 5, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.