Patent · US Active

Power semiconductor devices, semiconductor devices and a method for adjusting a number of charge carriers

US10424636B2 · kind B2 · utility

0Cited by
1References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 21, 2016
Grant dateSep 24, 2019
Priority date
Expiry dateMar 9, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/257
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A power semiconductor device includes a semiconductor substrate including at least one electrical structure. The at least one electrical structure has a blocking voltage of more than 20V. Further, the power semiconductor device includes an electrically insulating layer structure formed over at least a portion of a lateral surface of the semiconductor substrate. The electrically insulating layer structure embeds one or more local regions for storing charge carriers. Further, the one or more local regions includes in at least one direction a dimension of less than 200 nm.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.