Auto test grouping/clock sequencing for at-speed test
US10436837B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2015 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Jun 7, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31727
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method includes: defining a plurality of clock architecture attributes for a plurality of clock domains to be tested; assigning each one of the plurality of clock domains to a first test group; and refining the assignment of each one of the plurality of clock domains based on the plurality of clock architecture attributes until each of the plurality of clock domains is grouped into a current test group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.