Executing an operating system on processors having different instruction set architectures
US10437591B2 · kind B2 · utility
1Cited by
11References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2013 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Sep 1, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/509
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a first processor having a first instruction set and a second processor having a second instruction set that is different than the first instruction set. The apparatus also includes a memory storing at least a portion of an operating system. The operating system is concurrently executable on the first processor and the second processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.