Patent · US Active

Non-volatile memory testing

US10438680B2 · kind B2 · utility

0Cited by

1References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventor

Thorsten Bucksch · Munich, DE

Key dates

Filing date	Jun 30, 2017
Grant date	Oct 8, 2019
Priority date	—
Expiry date	Sep 28, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/3602
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Devices, systems and methods are provided which comprise testing of a non-volatile memory concurrently during at least a part of a testing of other system parts by a processor. In some examples, a device includes a processor, a non-volatile memory, a test controller, and at least one further circuit part. In a test mode, the processor is configured to test the at least one further circuit part, and wherein the test controller is configured to test the non-volatile memory concurrently with at least part of the testing of the at least one further circuit part.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.