Multi-chip packages with stabilized die pads
US10438877B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2018 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Mar 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/92247
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a general aspect, a multi-chip semiconductor device package assembly can include a leadframe having a first die pad and a second die pad. The assembly can further include a first semiconductor die coupled to the first die pad and a second semiconductor die coupled to the second die pad. The assembly can also include a blank having a first portion coupled to the first die pad and a second portion coupled to the second die pad, such that the blank forms a bridge between the first die pad and the second die pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.