Controller to detect malfunctioning address of memory device
US10446256B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2018 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | Jun 22, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2229/743
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller includes an internal memory to store an address and a memory control unit operatively coupled with the internal memory. The memory control unit includes logic to identify a malfunctioning address of primary data storage elements within an external memory device, the external memory device being another semiconductor device separate from the controller, store the malfunctioning address in the internal memory, and transmit, to the external memory device, a command to initiate a repair of the malfunctioning address using redundant data storage elements and an indication of an address associated with the malfunctioning address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.