Semiconductor device and method of forming double-sided fan-out wafer level package
US10453785B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2015 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Nov 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.