Electronic circuit having serial latch scan chains
US10459031B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2014 |
| Grant date | Oct 29, 2019 |
| Priority date | — |
| Expiry date | Oct 2, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318544
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The invention relates to an electronic circuit (10) having one or more latch scan chains (12), the electronic circuit (10) comprising (i) a built-in test structure (14); (ii) generation means (16) for simultaneously generating scan-in data for each of said scan chains (12); (iii) interception means (18) for simultaneously intercepting test lines (20) of said scan chains (12), said test lines (20) comprising scan-in lines (22) and/or control lines (24). Said interception means (18) are responsive to said generation means (16) in order to simultaneously feed the generated scan-in data into each of said scan chains (12) for initializing the electronic circuit (10). The invention further relates to a method for initializing an electronic circuit (10), as well as a data processing system (210) for initializing an electronic circuit (10).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.