Patent · US Active

Semiconductor device with amorphous silicon filled gaps and methods for forming

US10460932B2 · kind B2 · utility

1Cited by

88References

23Claims

0Family size

Assignee

ASM IP Holding B.V. · NL

Inventors

Steven R. A. Van Aerde · Tielt-Winge, BE
Kelly Houben · Sint-Bernard, BE
Maarten Stokhof · Leuven, BE
Bert Jongbloed · Oud-Heverlee, BE
Dieter Pierreux · Dilbeek, BE

Key dates

Filing date	Mar 31, 2017
Grant date	Oct 29, 2019
Priority date	—
Expiry date	Mar 31, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/038
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Amorphous silicon-filled gaps may be formed having no or a low occurrence of voids in the amorphous silicon fill, while maintaining a smooth exposed silicon surface. A gap in a substrate may be filled with amorphous silicon by heating the substrate to a deposition temperature between 300 and 500° C. and providing a feed gas that comprises a first silicon reactant to deposit an amorphous silicon film into the gap with an hydrogen concentration between 0.1 and 10 at. %. The deposited silicon film may subsequently be annealed. After the anneal, any voids may be reduced in size and this reduction in size may occur to such an extent that the voids may be eliminated.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.