Patent · US Active

Redundancy area refresh rate increase

US10468076B1 · kind B1 · utility

30Cited by
1References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 17, 2018
Grant dateNov 5, 2019
Priority date
Expiry dateAug 17, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2211/4068
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus may include an address counter to provide first address information and second address information. The first address information may include a first number of bits and the second address information may include a second number of bits that is smaller than the first number of bits. The address counter may perform a first updating operation. The first updating operation being such that the first address information is updated from a first initial value to a first final value. The address counter may also perform a second updating operation, the second updating operation being such that the second address information is updated from a second initial value to a second final value. In addition, the address counter may also perform the second updating operation at least twice per the first updating operation being performed once.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.