Method for managing the endurance of a non-volatile rewritable memory and device for programming such a memory
US10475509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2018 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | May 9, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for managing the endurance of a non-volatile rewritable memory including a dielectric material layer that switches between a high resistance state, with a first resistance value, and a low resistance state, with a second resistance value, the method including at least one of the following operations: at the end of each erasure operation: reading the first resistance value and comparing it with a first predetermined median resistance value, and determining the writing programming conditions from the comparison results; and at the end of each writing operation: reading the second resistance value and comparing it with a second predetermined median resistance value, and determining the erasure programming conditions from the comparison results, linking the programming conditions and the first and second read resistance values, the writing and erasure programming conditions being applied to the electrodes of the stack during the following writing and/or erasure operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.