Method for manufacturing semiconductor device
US10475640B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2018 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Sep 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/3171
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided herein is a method for manufacturing a semiconductor device. A substrate including a MEMS region and a connection region thereon is provided; a dielectric layer disposed on the substrate in the connection region is provided; a poly-silicon layer disposed on the dielectric layer is provided, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer is provided; and a passivation layer covering the dielectric layer is provided, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer, and a conductive layer conformally covering the connection pad and the poly-silicon layer in the transition region is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.