Semiconductor device having stacked dies and stacked pillars and method of manufacturing thereof
US10475770B2 · kind B2 · utility
5Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2017 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Feb 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06582
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various aspects of this disclosure provide a semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a stacked die structure and a method of manufacturing thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.