Transistor fins with different thickness gate dielectric

US10475791B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Hui Zang · Guilderland, US
• Garo Derderian · Boise, US
• Laertis Economikos · Hopewell Junction, US
• Chun Yu Wong · Ballston Lake, US
• Jiehui Shu · Clifton Park, US
• Shesh Mani Pandey · Saratoga Springs, US

Key dates

• Filing date: May 31, 2018
• Grant date: Nov 12, 2019
• Expiry date: May 31, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/853

Abstract

First and second fin-type field effect transistors (finFETs) are formed laterally adjacent one another extending from a top surface of an isolation layer. The first finFET has a first fin structure and the second finFET has a second fin structure. An insulator layer is on the first fin structure and the second fin structure. A gate conductor intersects the first fin structure and the second fin structure, and at least the insulator layer separates the gate conductor from the first fin structure and the second fin structure. Source and drain structures are on the first fin structure and the second fin structure laterally adjacent the gate conductor. The first fin structure has sidewalls that include a step and the second fin structure has sidewalls that do not include the step. The step is approximately parallel to the surface of the isolation layer.