Patent · US Active

Priority-based storage and access of compressed memory lines in memory in a processor-based system

US10482021B2 · kind B2 · utility

0Cited by
6References
28Claims
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Key dates

Filing dateJun 24, 2016
Grant dateNov 19, 2019
Priority date
Expiry dateDec 9, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/608
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In an aspect, high priority lines are stored starting at an address aligned to a cache line size for instance 64 bytes, and low priority lines are stored in memory space left by the compression of high priority lines. The space left by the high priority lines and hence the low priority lines themselves are managed through pointers also stored in memory. In this manner, low priority lines contents can be moved to different memory locations as needed. The efficiency of higher priority compressed memory accesses is improved by removing the need for indirection otherwise required to find and access compressed memory lines, this is especially advantageous for immutable compressed contents. The use of pointers for low priority is advantageous due to the full flexibility of placement, especially for mutable compressed contents that may need movement within memory for instance as it changes in size over time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.