Method of manufacturing a magnetoresistive stack/ structure using plurality of encapsulation layers
US10483460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2016 |
| Grant date | Nov 19, 2019 |
| Priority date | — |
| Expiry date | Apr 11, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5615
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching the first encapsulation layer which is disposed over the exposed surface of the dielectric layer. The method further includes (a) depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer and (b) depositing a third encapsulation layer: (i) on the second encapsulation layer which is on the first encapsulation layer and the exposed surface of the dielectric layer. The method also includes etching the remaining layers of the stack/structure (via one or more etch processes).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.